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Altera_Forum's avatar
Altera_Forum
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9 years ago

Timing violations - TimeQuest vs. Compile results ?????

I am pretty new to working with TimeQuest and working out timing violation in a design. In our current design we seem to be having some timing issues so I started looking at the TimeQuest analyser. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Thank you for that clarification. I am trying to ensure that for the specific multicycle constraint, if the latch clock is delayed it will not have an impact on the delayed data.

However I don't understand that when I run the constraints in TimeQuest and shows me that the setup violations are reduced, then when I do a compile with the same restraints the FMAX gets worse not improves and also there doesn't seem to be an improvement in the setup violations in the same magnitude as which I received in the TimeQuest ?