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Altera_Forum
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11 years ago

Timing constraints for DDR ADC Interface with AD9643

Hi, I am working on the DDR Interface with the AD9643 ADC from Analog Devices, but I am not able to catch proper signals! May be someone is familiar with 200MHz DDR Interface, here some informa...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I could catch proper ADC signals with DCO clock on a minimal design, which means that I've made a design only with the needed PLLs and the ADC readout with altddio. After shifting the phase to 90° it worked.

But I've I go back to my complete design with other parts, it is not working again - I guess the altddio is far away from the pin or another problem. Does anyone have some suggestions to me, for improving this matter?