Timing constraints for ALTLVDS I/O

Hippi Chik,

THis is a frustration for me as well. When using ALT_LVDS you need to use the following equation.

RSKM = UI - TCCS - SW - tEXT

UI = Unit Interval

TCCS = Channel-to-channel skew

SW = sampling window

tEXT = Trace mismatch

TCCS and SW are numbers that Altera provides in their data sheet. You can not use Tsu and Th numbers when using ALT_LVDS receiver. The ALT_LVDS receiver uses special circuitry to balance the sampling window in the middle of data. When you configure the ALT_LVDS block you are configuring a lot of hidden "stuff" in the block that ensures that the SW is within the published spec. SW has been characterized across PVT and is a 'guaranteed' number.

You can think of SW as a balanced Tsu and Th number.

Remember that these equations apply to the whole interface, but they can be used on a bit by bit basis.

This is a complicated issue so if I didn't answer the question let me know. I have spent a lot of time with Altera applications on this question because it is very confusing.

This only deals with the ALT_LVDS receiver. If you are in a mixed system with other devices the answer can be a little different. THis is all documented in teh various device handbooks under "High-Speed Interfaces".