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Altera_Forum
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15 years ago

Timequest/SDC: How to Constrain Input Data Relative to an Output Clock?

Hi I am interfacing to a DDR SRAM (not SDRAM), and am clocking read data with a clock generated in the FPGA, rather than a source synchronous echo clock generated by the SRAM. The SRAM i...
Altera_Forum's avatar
Altera_Forum
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15 years ago

Not fully getting it, but just put the generated clock on the output port and it will calcualate all the way to the signal going off the device(i.e. to the external side), which is what you want.