Forum Discussion
Altera_Forum
Honored Contributor
10 years agoThis seems a very odd setup. Why are NDATA and l_ready used to asynchronously set the state machine and data bit? thats not very timing safe. They should be part of the logic that flips the design out of the IDLE state. This is the only reason I can think of it's chosen to make the idle state as some form of clock in your async logic.