TimeQuest timing relationship for unrelated clocks

I'm not expert on this subject, but I think the only way to handle this is to use multicycles.

Clearly, at design stage, signals of unrelated clock domains must add waitstates or any other synchronization circuitry to make sure to meet the timing of the other clock. If frequency are different I guess you need to add at least F_high/F_low+1 synchronization cycles and define multicycles constraints accordingly.