Forum Discussion
Hi IDeyn,
The clock you're looking at, divclk, is not directly derived from refclk. Vcoph[0] first derived from refclk. The rise and fall times for vcoph[0] have to be between 1.667 and the period of 3.333, which is why we see the drop in rise time at any refclk offset greater than 3.333. divclk inherits its rise and fall times from vcoph[0], not refclk.
If you want to force divclk to mirror the offset you add to refclk, you can overwrite its waveform with the -offset option as follows:
create_generated_clock -name {ip1_inst|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER|divclk} -source {ip1_inst|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER|vco0ph[0]} -divide_by XX -multiply_by YY -duty_cycle 50.00 -offset X.XXX { ip1_inst|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER|divclk }
Thanks
Hi YY,
Thank you for your answer. Ok, I will try create_generated_clock with -offset option.
I understand that I see the derivative from vco clock. But for me it looks that derive_pll_clocks in that case (as you said "mirroring the offset")
is error-prone, so maybe it is useful to upgrade this command or explicitly mention that in manual.
Best regards,
Ivan