TimeQuest RGMII Problem

I found the problem, but without running your test I probably wouldn't have. As I mentioned in my original post, I am not a TimeQuest expert. I rarely ever use the TimeQuest UI. I generally edit the sdc file then rerun the full TimeQuest analysis from quartus using the TimeQuest play button on the quartus toolbar. Then using the compilation report, I browse to the timing violation, then right click and choose "Report Timing ... (In TimeQuest UI)". I don't think there is anything technically wrong with this procedure, but the delays internal to the FPGA change when I follow this procedure. If I switch to the TimeQuest UI and reset the design then run Report All Summaries then right click Report Timing, the internal FPGA delays don't change (or in other words this generates the correct results).