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Altera_Forum's avatar
Altera_Forum
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13 years ago

Timequest output to extrernal device SDC question

I was attempting to create a SDC file to constrain my outputs but I think I do not understand the case when the FPGA drives an external device with its own clock. For the FPGA inputs I feel like I u...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Hi,

yes, I meant set_output_delay.

TimeQuest is complaining because you haven't put restrictions on the delay between clkin1 and clkout1.

You can either

a) set_max_delay AND set_min_delay

b) set_false_path, which is what I'd do

c) ignore TimeQuest (which is the same as option b)