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Altera_Forum
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14 years ago

TimeQuest get_ports filtering for in-/outputs only

Hi,

I have a bus with both input and output pins, all names starting with PCI_

When writing a set_input_delay or set_output_delay I use

[get_ports {PCI_*}]

The compiler than generates warnings :(, because I have (also) inputs where I only should have outputs and vice versa.

Can I add a filter or so to get only all inputs starting with PCI_ ?

Thanks,

Michael

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    No. (There are filters called [all_inputs] and [all_outputs] but they're not searchable.

    I often do a list, so I don't have to repeat the long list, i.e.:

    set pci_inputs {PCI_AD* PCI_TRDY PCI_IRDY PCI_CBE*}

    Then use that list for all my assignments:

    set_input_delay -clock clk_ext -max <value> $pci_inputs

    set_input_delay -clock clk_ext -min <value> $pci_inputs

    Not exactly what you want, but it might help.
  • Altera_Forum's avatar
    Altera_Forum
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    Thank for your quick reply. I will do so. In that way it's easy to change or add assignments.

    Perhaps, when writing the list I will find some (asynchronous or not used) signals which don't need an assignment at all :).
  • Altera_Forum's avatar
    Altera_Forum
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    Always run Report Unconstrained Paths in TimeQuest. That will tell you if you missed any I/O.

  • Altera_Forum's avatar
    Altera_Forum
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    Meanwhile I added the lines below

    set pci_inputs {PCI_LHOLD PCI_LINTO_N PCI_LSERR_N PCI_LW_R PCI_LBE_N* PCI_LA* PCI_LAD* PCI_DPARITY*}

    set_input_delay -clock { PCI_CLK_FPGA } -min -2.2 $pci_inputs

    set_input_delay -clock { PCI_CLK_FPGA } -max 7.5 $pci_inputs

    but I get the warning

    Warning: Assignment set_input_delay is accepted but has some problems at Camtest.sdc(125): Set_input_delay/set_output_delay has replaced one or more delays on port "PCI_LA[2]". Please use -add_delay option.

    I get this warnig for each signal. Any idea?
  • Altera_Forum's avatar
    Altera_Forum
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    Solved the problem: I didn't compile the project but only re-read it inside the TimeQuest analyzer. After compiling the warnings have disappeared

  • Altera_Forum's avatar
    Altera_Forum
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    Note that PCI_LA* encompasses PCI_LAD*. Since you have {} around the list, you can use square brackets directly inside:

    set pci_inputs {PCI_LA[*] PCI_LAD[*]...}

    Might help avoiding unwanted matches(although that's pretty unlikely for I/O).