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Altera_Forum
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8 years ago

TimeQuest found "Unconstrained Paths"

Hello, Before approach "timing analysis" I've studied the ryan scoville's "TimeQuest User Guide", that can be found here: http://alterawiki.com/wiki/timequest_user_guide In the sectio...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi,

create generated clock for clock output pin which goes to SDRAM chip and constrain output pins to clk_ext 

create_generated_clock 	-name clk_ext  -source  
set_false_path -to

Create virtual clock and constrain input ports to virtual clock clk_ext_virt 

create_clock -name clk_ext_virt -period