Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

TimeQuest doesn't recognize generated clocks anymore

Hi,

I have a weird behaviour of my TimeQuest since I have done a compilation with the Design Space Explorer (DSE):

Since then, when I generate a new .sdc-File for my project and derive the generated clocks, it always uses the values before the DSE-Compilation.

If I change some parameters (phase) in my PLLs, they aren't recognized anymore. I have to set them by editor in the generated .sdc-File.

Another result of this is that Quartus tells me on compilation:

Warning (332056): PLL cross checking found inconsistent PLL clock settings:

Warning (332056): Clock: XXX_PLL_1|altpll_component|auto_generated|pll1|clk[1] was found on node:

XXX_PLL_1|altpll_component|auto_generated|pll1|clk[1] with settings that do not match the following PLL specifications:

Warning (332056): -phase (expected: 135.00, found: 45.00)

Is this setting locked somewhere? How can I unlock this?

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Are you using derive_pll_clocks or manually doing create_generated_clock for your outputs? If derive_pll_clocks, find that in the TimeQuest messages and find the create_generated_clock call it is making and see if it is applying the wrong settings there.