Timequest & Output delay problem

Rysc:

Yes the arrow should be going in the other direction and you are correct that the value I calculate is negative. I used the examples from the TimeQuest Timing Analyzer Cookbook document with setting the delay value using an expression including board delays i.e. expr [CLKBs_max - Tsub_max + BDb_max - CLKBd_min] with the Tsu number being much higher than any of the other values. In the example with the numbers defined I would also expect that the example number would be also be negative.

Interestingly enough I looked at another output pin on a different clock (similar conditions to my first example) and it seems to be calculatiing things correctly - but it shows a -10.00 output delay value with the arrow heading left from the latch edge. And this makes sense. But this output delay also uses the same expression calculation with a setup number much higher than any of the other values.

At this point I'm a little puzzled about why one works and the other does not but at least I understand what the timing analyzer is doing.

Seems like I need to force the results of the expression calculation to be positive or simplify the calculation such that it cannot be negative.

If you have any other thoughts please let me know.

Thanks,

Alan