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Altera_Forum
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16 years ago

TimeQuest : Find unconstrained path

TimeQuest reports that there is an unconstrained path in its diagnostic report unconstrained Paths.

It says that there is 1 unconstrained input port and 1 unconstrtained input port path, but not under setup neither hold analysis is mentioned anything. none of the reports gives me a clue what input port this could be.

has anybody an idea how i can determine what is missing, or how to find out what could be the source ?

even more, this fpga is based on a platform where the same pcb is used with for different fpga projects. so the sdc files used are the same for all quartus projects based on this pcb. they only difference is that the fpga itself may change due to migration and the ips could be more or less depending on the project.

unused pins, like ethernet if no mac is included are left unconnected if input or set to gnd or vcc if output t enshure safe funtionality.

any comment greatly apriciated and welcome.

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    --- Quote Start ---

    i had already launshed the timequest and got these informations from the reports but unfortunately this report does not give any hint what is unconstranied.

    it does not tell any name, thats why i ssked for ... only numbers how many inputs ports and paths

    what i had already seen is that a verilog HDL block like

    always @ ( posedge clock or negedge nreset)

    could instroduce hard to find clocks as the negedge nreset could be clock

    so still i am seeking for an idea how to find the unknown input ...

    but thanks anyway

    --- Quote End ---

    Hi MSchmitt,

    after you have run the "Report Unconstraint Paths" you should get in the Report window

    your unconstraint paths with two folders. One for setup and one for hold Analysis. When you open the folder you get the requested info. Look to the attachment.

    Kind regards

    GPK
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Launch the TimeQuest, click read sdc file, then click reports->individual reports->report unconstrained paths

    From the Unconstrained Input Ports(Output...) reports, you can determine the port.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    i had already launshed the timequest and got these informations from the reports but unfortunately this report does not give any hint what is unconstranied.

    it does not tell any name, thats why i ssked for ... only numbers how many inputs ports and paths

    what i had already seen is that a verilog HDL block like

    always @ ( posedge clock or negedge nreset)

    could instroduce hard to find clocks as the negedge nreset could be clock

    so still i am seeking for an idea how to find the unknown input ...

    but thanks anyway
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    boah .... i realy need my holidays and have some days off work ...

    there was only one very short line

    sw[0] clk1

    on that big tft and i must have overseen it all the time

    if somebody from Altera reads this, please color all those folders red that contain anything that needs to be fixed like unconstrained stuff and not only the summary.

    Thanks for waken me up ...