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Altera_Forum's avatar
Altera_Forum
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14 years ago

Timequest - specify different output delays for different paths

Hi

I am trying to interface to a bus which has different timing requirements for clock to bus driven and clock to data. It allows a short time for clock to data but a much longer time for the tristate buffers to turn on. The data register and the output enable register must be on the same clock. Does anyone know how to express this in Timequest?

It works in the old timing analyzer with the following assignments:


set_instance_assignment -name TCO_REQUIREMENT "6 ns" -from "data_reg" -to "data_pin
set_instance_assignment -name TCO_REQUIREMENT "14 ns" -from "enable_reg" -to "data_pin
But in Timequest, there does not appear to be a way to specify the source register with set_output_delay.

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    The fact that you have two internal Tco requirements should not mean you need two output delays. If the pin is the same, then the external delays are the same, and therefore, you only need to worry about a single output delay. Or are the output delay changing based on which register it is coming from?

    That said, you should be able to use set_max_delay to define the delays on these two different paths.

    Hope this helps.
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    The fact that you have two internal Tco requirements should not mean you need two output delays. If the pin is the same, then the external delays are the same, and therefore, you only need to worry about a single output delay. Or are the output delay changing based on which register it is coming from?.

    --- Quote End ---

    I'm designing to a specification so actual external delays don't matter. I just need to express what the specification says.

    --- Quote Start ---

    That said, you should be able to use set_max_delay to define the delays on these two different paths.

    --- Quote End ---

    Thanks, it looks like that may do what i need. I'll try it.
  • Altera_Forum's avatar
    Altera_Forum
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    set_max_delay is the correct override. I believe the original PCI worked like that, whereby all data was sent within the clock period, but the OE timing was a requirement in the middle of the clock window, so that all drivers were off before somebody new starts driving the bus.

    Remember that set_max_delay and set_output_delay work together. For example, if you do a "set_output_delay -clock ext_10ns_clk -max 3 [get_ports data_out*]" then you're saying data_out* drives an external register that is clocked by ext_10ns_clk and the external delay to get there is 3ns. There will be a setup relationship between the internal clock driving your output register and this external clock. Most likely both clocks are the same frequency, so let's say it's a 10ns setup relationship. When you apply a "set_max_delay -from [get_keepers oe_reg*] 7", you're overriding the setup relationship from the oe_reg to the external register, so instead of 10ns it is now 7ns, but the external delay is still there. So, in this example, the set_max_delay makes the setup relationship become 7ns and 3ns of that will be used externally, so the oe has to get its data out in 4ns, basically like a 4ns Tco. You should see in the report_timing a value called oExt that shows this external delay.

    I mention this because users often think of set_max_delay as a complete override, and so it acts like a Tco. That's true if there is no external delay(and no phase-shift or falling edge, but that's another story). But if there is an external delay, that is used in set_max_delay's calculation.
  • Altera_Forum's avatar
    Altera_Forum
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    Thanks Rysc, that's really good info. Works just like you describe, and i probably would have been one of the users to expect set_max_delay to be a complete override instead.

  • Altera_Forum's avatar
    Altera_Forum
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    The .sdc terminology was written a long time ago(probably decade/s before Altera started using them). Having dove into the details, I am overly impressed with how it works and how much thought was put into it, but I think a lot of confusion would have been avoided if set_max_delay and set_min_delay had been called something like set_setup_relationship and set_hold_relationship, since that is exactly what they do.