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Altera_Forum's avatar
Altera_Forum
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16 years ago

Time Quest: Fail Setup Time n etc

Hi. I just switch from classic timing analysis(CTA) to time quest analysis(TQA). Some steps are performed(as in TimeQuest Timing Analyzer.pdf) to do switching on timing analysis. After sdc ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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Hi. I have no idea how to describe the details to you. However, i will attach the verilog and sdc file.

Pls have a look on it. May you show or guide me on how to write sdc file?

FYI, i just want to do timing simulation without any pin assignment.

thanks a lot

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Hi,

your create_clock command was not correct, therefore TimeQuest uses the default

clock of 1GHz. I have a new SDC file attached.

Kind regards

GPK