Forum Discussion
Hi Sir,
I PM’ed you to ask for your contact so that I can contact you before I off starting today until the end of next week. But unable to get your reply. So, let me try to respond to you here.
The example design that I mentioned is the EMIF example design (ED). I am suspecting this because the IE (internal error) comes from the EMIF IP. So, I assume you have the EMIF (ddr4) ip in your design right? So, I am asking you to generate the emif ED and compile it to see if you also see the same error.
I tried the EMIF compilation at my side and I can’t see the IE.
So, I suspect the IE only happens in your design which maybe has some illegal connection. Thus, you can compare your design vs the ED. See if you export all the interface signals to the top-level (to external I/O). and also the local interface signal (amm_* -avalon-memory mapped signal) to the user logic (or any driver like nios processor).
Hench, please try with my suggestions as above. If the issue still persists, you can archive the design to .qar format (in quartus, go to project tab, archive project). Then zip the .qar file (because qar format is not allowed to attach in the forum). I will look into your design when I got the chance to online.