The library usage in Quartus

This is just a VHDL library to declare the std_ulogic, std_ulogic_vector (and std_logic etc) types. Because of the VHDL typing rules you cannot do alot without them for synthesisable logic.

The libraries tab in quartus are for user libraries. it also dictates the search path for any .inc files (if for some reason you're using AHDL).

So there is no way to use std_logic_1164 in verilog because it doesnt exist. it is a VHDL only thing because of the way the language works.

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This is just a VHDL library to declare the std_ulogic, std_ulogic_vector (and std_logic etc) types. Because of the VHDL typing rules you cannot do alot without them for synthesisable logic.

The libraries tab in quartus are for user libraries. it also dictates the search path for any .inc files (if for some reason you're using AHDL).

So there is no way to use std_logic_1164 in verilog because it doesnt exist. it is a VHDL only thing because of the way the language works.

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Thanks very much. Yes, Verilog does not need VHDL library. But user libraries can be used for both in VHDL and Verilog, right?

Another question I have is: what kind of files is inside user libraries? Customized IP?

Thanks.

VHDL modules and packages.

It's a nice way to organize stuff, when you're writing re-usable stuff.

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VHDL modules and packages.

It's a nice way to organize stuff, when you're writing re-usable stuff.

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Thanks, so that means even user libraries are only for VHDL? I am a little confused by this.

Thanks again.

What are you trying to do?

All the libraries in Quartus really lets you do is add a search path. I dont really use it, even for reusable stuff.

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What are you trying to do?

All the libraries in Quartus really lets you do is add a search path. I dont really use it, even for reusable stuff.

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Hi, I just want to understand what is usage of libraries. I have never use them. I just wonder whether libraries will like libraries in software programming language (such as C++), there are designed modules inside them (definitely no class since there is no class definition in HDL).

As you mentioned, "All the libraries in Quartus really lets you do is add a search path", If I want to use some IPs from third-party vendor (not IP come from Altera), I actually need is the .v or .vhd file of IP, right?

Thanks very much.

If you know C++, then it's easy: the concept of a VHDL library is akin to a C++ namespace. That's all.

In Verilog, there's no notion of this.

If you need to use third-party IP, you'll need some kind of Verilog/VHDL/AHDL file.

It may not be the original source code, though.

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If you know C++, then it's easy: the concept of a VHDL library is akin to a C++ namespace. That's all.

In Verilog, there's no notion of this.

If you need to use third-party IP, you'll need some kind of Verilog/VHDL/AHDL file.

It may not be the original source code, though.

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That is clear. Thanks very much!