Altera_Forum
Honored Contributor
14 years agothe classis timing
i use the soft is quartus10.0 , and the time is classis timing analysis . EP3C5
1 : then i have find the ploblem ,it is that when the pin is used for input , then i use the chip planner and find this pin ,then cllck the pin ,and the resource property editor is appeared , the question is this : 1) : i found the "input pin to logic arry delay 0" is used ,and the value is 6 , then i change the value ,but the value is no changd , can you tell me why it is ? 2) : can you tell me how to use the "input pin to logic arry delay 1" , because i found the "input pin to logic arry delay 1" is graaly . 3): what is it different form the "input pin to logic arry delay 0" to "input pin to logic arry delay 1" ; 2 : when the pin is used for output , and i click the chip planner and the resource property editor , then i found the output property "output pin delay " and the "output enable register tco delay" is gray . so i have a question is 1):how to set in assignment ,then the outputpin can use the "output pin delay " or the "output enable register tco delay" 3: in assignment property , i find the setting "input delay from pin to internal cells " and "input delay from pin to input register" , can you tell the different form input delay from pin to internal cells " to "input delay from pin to input register" . thankyou