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1 Reply
- Altera_Forum
Honored Contributor
Do you have .qip files in your design? (Quartus IP files). They basically bundle all the IP files(i.e. I'm looking at a QSYS project with over 50 files, all added this way so the user doesn't have to manually manage them). If you look inside, the syntax used is something like so:
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) submodules/pci.v] The $ does variable substitution in Tcl. So $::quartus(qip_path) substitutes the hierarchy path to the .qip file. So wherever the user has the .qip file, as long as there is a /submodules/pci.v from it, it will find it. It allows all the IP to be bundled, moved around, added to other projects, etc. In Tcl unset removes the value of a variable. So what is your error from? I have no idea. : ) But hopefully that an help debug. Look in the .qip files for an unset. Does the design compile normally?