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Altera_Forum's avatar
Altera_Forum
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16 years ago

SystemVerilog - module ports including interfaces with parameters

Quartus 9.0 I am new to SystemVerilog. I want to package certain common interfaces using 'interface'. For example: ///////////////////////////////////////////////////////////////////...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Well, it's a weak form of typing, but better than nothing.