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Altera_Forum
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16 years ago

SystemVerilog - module ports including interfaces with parameters

Quartus 9.0 I am new to SystemVerilog. I want to package certain common interfaces using 'interface'. For example: ///////////////////////////////////////////////////////////////////...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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Thank you. I see now that generic interfaces simply use 'interface' (like some object-oriented languages which derive all classes from 'Object') and that type-compatibility is checked at instantiation (rather than constructing a 'full' type hierachy and deriving from the most appropriate, so that type-compatibility can be checked when the subsidiary module is compiled).

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Exactly..

one thing to remember, be sure that all of you interfaces are first in the compile list. Quartus must see the interface before it sees the instantiation. This applies to packages as well.