Forum Discussion

Occasional Contributor

4 months ago

Solved

Synthesis report about inference

Hello, I know it that other synthesis tools that there are certain reports, which list what kind of logic macro blocks (e.g. RAM, FIFO, MUX, Adder) is inferred for certain HDL constructs. I could n...

FvM
3 months ago
Hi,
inference is basically reported in <project>map.rpt file

Regards
Frank

KennyT_altera

Super Contributor

3 months ago

Hi,

For inference, they are certain coding style you need to refer:

https://www.intel.com/content/www/us/en/docs/programmable/683283/18-1/ram-style-and-rom-style-for-inferred-memory.html

and you can open one verilog.v file. right click and insert template -> system verilog, look for the code to infer the RAM.

You can check the report in compilation report -> fitter -> place stage -> resource utilization.

Thanks,

Best regards,

Kenny Tan

Forum Discussion

Synthesis report about inference

Recent Discussions

The best way to implement SignalTapII

Quartus Prime Pro Hierarchy View has blank rows for some instances

Quartus Prime Pro Embedded Edition

How-to generate dual-port (read/write) RAM with clock enables

Agilex 5 IOPLL Max Numbers and Tool Display Mismatch