Forum Discussion
FabianL
Occasional Contributor
Occasional ContributorSynthesis report about inference
Hello, I know it that other synthesis tools that there are certain reports, which list what kind of logic macro blocks (e.g. RAM, FIFO, MUX, Adder) is inferred for certain HDL constructs. I could n...
Hi,
inference is basically reported in <project>map.rpt file
RegardsFrank
KennyT_altera
Super Contributor
Super ContributorHi,
For inference, they are certain coding style you need to refer:
and you can open one verilog.v file. right click and insert template -> system verilog, look for the code to infer the RAM.
You can check the report in compilation report -> fitter -> place stage -> resource utilization.
Thanks,
Best regards,
Kenny Tan
