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fxmelvin's avatar
fxmelvin
Icon for New Contributor rankNew Contributor
4 years ago
Solved

Synthesis - Incorrect SystemVerilog interface parameter override

I have come across an issue where Quartus Pro (21.x) Synthesis incorrectly resolves an interface parameter to its default value rather than the value with which it should've been overridden by the in...
  • ShengN_altera's avatar
    ShengN_altera
    3 years ago

    Hi @fxmelvin ,

    FYI. The bug had been fixed and implemented in Quartus Pro Edition version 22.4 internal build. Tested and worked fine check the image below:

    Kindly wait for the version release. Thank you for your patience.

    Thanks,

    Best Regards,
    Sheng

    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
4 years ago

Hi,

I notice you use localparam for logic INIT_V in mem_if. Try don't to use that else DATA_W and ADDR_W will be assigned with local parameter. Delete the localparam and add INIT_V to modport mem will do.

Best regards,
Sheng

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.