Syntax Error

Hello,

it's not illegal to ask with coding problems.

The first thing I suggest is to let Quartus show the error line, that's simpler than counting source code lines.

for gL in 1 to 15 loop
  greenL : delay port map (d, clk, q);
  gL <= gL + 1;	
end loop;

Your instantiating a component in sequential code (in a process). Components can only be instantiated in concurrent code. Furthermore the usage of the component makes no sense at all, cause identical d and q signals are used in multiple instances. It's also not possible to increment a loop variable. I don't see clearly, what your trying to achieve here.

Regards,

Frank