Stratix III M9K/M144K true-dual-port support 1/2 the max width.

Because the routing in an FPGA is configurable, and therefore takes a lot of silicon, adding ports into a RAM is not an insignificant amount of the die. (Most people think of the number bits as the only important part, which is more true for an ASIC). So tricks like are done like using them all in single port mode and only half in dual-port is done(i.e. only have X many ports and use them as much as possible.)