Storing 8 bit data in SDRAM in DE 0 Nano

Hello Tejas,

There is a nice tutorial: Using SD ram on DE0 Nano from Altera university.

ftp://ftp.altera.com/up/pub/altera_material/15.0/tutorials/verilog/de0-nano/using_the_sdram.pdf

I used to get started with the SDRAM.

ps: You might need a separate PLL get the timing of the FPGA and the SDRAM in line. This is at the end of the tutorial, but very important.

Good luck,

Johi.