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Altera_Forum
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9 years ago

Store complex decimal values as 2D array in a rom in verilog

I need to perform convolution between 2 matrices in verilog : a 7x7 matrix that holds complex double values and a 72x300 matrix that stores double values.

How should I store such a matrix in rom? Also creating 72x300 matrix involves storing large number of coefficients.

I am not able to understand how to initialize them and use them to perform convolution.

Please help!

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  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    I need to perform convolution between 2 matrices in verilog : a 7x7 matrix that holds complex double values and a 72x300 matrix that stores double values.

    How should I store such a matrix in rom? Also creating 72x300 matrix involves storing large number of coefficients.

    I am not able to understand how to initialize them and use them to perform convolution.

    Please help!

    --- Quote End ---

    Is there no solution ? Please help..
  • Altera_Forum's avatar
    Altera_Forum
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    What exactly are you having problems with? Have you even attempted to write any code?

  • Altera_Forum's avatar
    Altera_Forum
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    My query is how to build a matrix in verilog? without which how can i perform convolution?

  • Altera_Forum's avatar
    Altera_Forum
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    If you have a verilog or VHDL file opened in Quartus you can try inserting a ROM template that will drop in code that implements a ROM. If I remember correctly it's under "edit" --> "template"

  • Altera_Forum's avatar
    Altera_Forum
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    For a 72x300 matrix you could use a rom with 128 by 512 addresses (64k). The Upper 7 bit is your first axis, the lower 9 addresses is your second axis in this case.

    Depending on the data width this will be a big RAM, at least for a FPGA onchip Memory.

    Assuming that your double value has 64bit you need 512kByte.

    The 7 by 7 matrix needs 64 adresses with 128bit each:

    
    module array (
    		input   x_i,
    		input   y_i,
    		output  re_o,
    		output  im_o
    	);
    	reg  array;
    	initial
    	begin
    		array = {64'h00000000deadbeef, 64'h00000000affedead};
    		array = {64'h0000000000000000, 64'h0000000011111111};
    		array = {64'h0000000011111111, 64'h0000000022221111};
    	end
    	assign re_o = array;
    	assign im_o = array;
    	
    endmodule
    

    Though i don't know your exact requirements i would recommend to use the Altera altsyncram with a initialization .mif File. And a big enough FPGA.