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Altera_Forum
Honored Contributor
12 years ago --- Quote Start --- It depends on the FPGA. Some FPGAs have an IO_PULLUP pin that can be used to define whether weak pull-ups are enabled or not during power on, i.e., you have a "global" option, rather than a per pin option. Generally I use pull-up or pull-down resistors on control signals that I want to guarantee have a particular state when the FPGA is not configured. Cheers, Dave --- Quote End --- Hi Dave, Thanks for the reply. I am using Cyclone IV FPGA. Does it have the IO_PULLUP pin you mentioned? Also, how I control this IO_PULLUP pin?