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Altera_Forum
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13 years ago

standard deviation and covarience VHDL implementation

hi i've built a component that calculates standard deviation & covariance hence i 've used real(), to_stdlogicvector(), integer(), to_integer() and a converting methods to satisfy the 2 equat...
Altera_Forum's avatar
Altera_Forum
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12 years ago

to_stdlogicvector() is non standard, and it's recommended not to use it. Instead use the signed and unsigned types from numeric_std, and the to_unsigned() and to_signed() functions. Those are synthesizable (from integer), as is to_integer() (from unsigned and signed).