Standard " Interface to User Logic" in Qsys Component Editor

I changed to Q13.0 from Q7.1 (also from Sopc to Qsys) just right now, then I are struggling many difficulties.

But the first thing is I need an "Interface to User Logic" to control some devices, which is "..\sopc\legacy components\interface to user logic".

I tried to build it in Qsys Component Editor, but I'm not sure if it's correct?

The attached pictures and codes are listed

You're very kind if can give any advice.

// ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

`timescale 1 ps / 1 ns

module bus32bits (

input clk, // clock.clk

input resetn, // reset.reset

input [9:0] address, // s0.address

input read, // .read

output reg [31:0] readdata, // .readdata

input write, // .write

input [31:0] writedata, // .writedata

input chipselect, // .chipselect

output [9:0] bus_add, // conduit_end.export

output bus_read, // .export

output bus_chipselect, // .export

input [31:0] bus_rd_data, // .export

output bus_write, // .export

output reg [31:0] bus_wr_data // .export

);

assign bus_write=write;

assign bus_read=read;

assign bus_add=address;

always@(posedge clk)

if(!resetn)

bus_wr_data<= 32'b0;

else

begin

bus_wr_data=(write&&chipselect)?writedata:32'hzz;

readdata=(read&&chipselect)?bus_rd_data:32'hzz;

end

endmodule

// ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

The interface should be like that.

component editor signal