ST Avalon Source/Sink Template or component example

I don't know of any template since it's a trivial interface (if valid and ready are high, data moves from the source to the sink). I would generate a streaming FIFO in Qsys and take a look at the logic implementing it. You'll find the output data of the FIFO wires up the ST valid signal to "not empty" and the input side will use "not full".