Altera_Forum
Honored Contributor
Honored ContributorSPI Slave Implementation
I am writing a code of SPI slave in FPGA. Is it necessary to sync my FPGA global clock and serial clock ? If so can someone tell me the pros & cons for the same ?
Forum Discussion
Altera_ForumHonored Contributor
Honored ContributorYes. You would sample the serial clock using your global clock to detect when an edge occurs. Using the serial clock is not really a good idea.
