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Altera_Forum's avatar
Altera_Forum
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11 years ago

SPI Master/Slave Interface

Dear All, I am trying to simulate the testbench of the master and slave SPI interfaces from the opencores.org website but I get the following error message: error (10533): VHDL wait Stat...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Unfortunately the image to small to read, even with my 'computer glasses' :)

Perhaps you can archive the project and either post the .qar here or send it to my private message box.

Regards,

Josy