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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

SPI core as Master mode?

Hi. Still getting the ropes here. I'm including SPI peripherals to my design for Max10 FPGA. Is it possible instantiate an SPI core in Platform Designer as master?, using Max10 FPGA?, Quartus Prime...
USo00's avatar
USo00
Icon for New Contributor rankNew Contributor
6 years ago

In Quartus 17.0 Lite edition, you can find the SPI core which can be set to master/slave under the "SPI (3 wire serial)" core in the Qsys IP Catalog. I think that's what you're referring to.