Source Synchronous Analysis with TimeQuest

StephenG I downloaded your example design and compiled it on my PC. I analyzed the TimeQuest numbers to verify that the LVDS_RX block was actually sampling the data inside the 400ps sample window. I attached a spreadsheet that shows the delay times and calculations I made (it also includes the TimeQuest commands to get my numbers).

Based on my interpretation of TimeQuest it appears that the LVDS_RX block is not sampling inside the Sample Window. For your LVDS block you chose a phase alignment of rx_in with respect to rx_inclock of 0 degrees, so edge aligned. Meaning the FPGA needed to phase shift 90 degrees to get center aligned data inside the sample window. In the spreadsheet my calculations say that the phase shift is somewhere between 30-60 degrees for most of the data (across temperature), and the sample window is between 64.8-115.2 degrees (+/- 200ps).

Am I missing something in my analysis or is the LVDS_RX block actually sampling incorrectly?

Thanks for the help!