Source Synchronous Analysis with TimeQuest

Thanks for the quick replies, that all makes sense.

Referencing Table 1-36, “LVDS Receiver Timing Specification for Cyclone IV Devices” out of the Cyclone IV Device Data sheet. It indicates for a speed grade C6 the IO can run up to 437.5 Mhz. Is this assuming SDR and is capable of using the IOBFF and that is how the part can reach these high speeds?

Is there any place in the Altera documentation that attempts to specify an equivalent table for DDR IO?