Altera_Forum
Honored Contributor
15 years agoSOPC and multiple memory interfaces-different clocks
I'm diving in and now I have a question that has been raised concerning our system. We have multiple memory interfaces that will all be operating at different speeds: SRAM, DDR, NVRAM, and FLASH. All of the controllers we want as slaves on the Avalon-MM controlled by a Nios II master. Each has a different max clock frequency. If all of the clocks are available and each slave has it's respective clock, does SOPC configure things appropriately to ensure optimal transfers across the different clock domains?
Brett