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Altera_Forum's avatar
Altera_Forum
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14 years ago

Some bits in reg are disappeared!

I wrote a project at Quartus II 9.1.But the resulst is always wrong.I fond some bits in some registers are disappeared!For instance the are only 6 bits in reg [7:0] max_value, 2 bits are disappeared!...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

As I already it's most likely not an error. SignalTap's representation is hardware related. If you display a bit-vector register, but some bits aren't actually existing as register bits, they aren't recorded and not filled in when displaying the values.

Your observation, that the design output changes, when the "missing bits" are exposed as outputs, needs further explanation. If these bits are unequivocally processed for the final design output, they won't be discarded. There must be something special with your design.