Simulator Tool/PowerPlay

Simulator Tool Reports the following message:

Warning: Cannot find channels in vector source file for the following output ports - channels are required for VCD file generation for PowerPlay Power Analyzer.

PowerPlay Analyzer reports:

Warning: Node: CLK_TOP was determined to be a clock but was found without an associated clock assignment.

Power Estimation Confidence: Low: user provided insufficient toggle rate data.

Essentially my question is, how can I create vector source files which contain all the information that is apparently missing when I run my simulations? I can't seem to find any method for specifying output channels, and I have no idea where to set a clock assignment aside from the .sdc constraint file I am using. I would really like the most accurate power estimates I can possibly get.

Thanks very much!