Honored ContributorHi All,
In Quartus-II, how the tool distinguish between the RTL (design) and Simulation files? How should I add the Simulation/Testbench files to Quartus-II project? How should I mark them so that they will not take a part in the implementation flow? Thank you!
Honored Contributoryou enter a top level entity for Quartus, this can be done in the project settings. I beleve you can also rightclick a file in the fileslist and select "set as top level entity". as your top level won't include testbenches this is being taken care of automatically.
Honored ContributorFor RTL simulation files (.v or .vhd), Quartus cannot distinguish between synthesis and simulation files other than when you try to synthesize a simulation file that has commands that can't be synthesized.
All you need to do in Quartus is add the synthesis files in the project settings, setting one of them as the top-level entity. Any files not in the settings, even if it is in your project directory, will not be used for synthesis.Honored ContributorQuartus is not a simulation tool. You should only include RTL design files.
Simulation files should only be included in a simulation tool (like modelsim)Honored ContributorHonored Contributor
