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Altera_Forum
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16 years ago

Simulation/synthesis mismatch

My design uses lvds transmitters and receivers. When I use a serialization factor >2 it works fine. I need to use a serialization factor of 2, which converts the lvds blocks to ddio primitives. Th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

You could create a Quartus project with that one component and set all the ports to virtual pins. Set up Simulation EDA settings to generate a vho file. Then use the vho in your simulation.