Forum Discussion
Altera_Forum
Honored Contributor
13 years agohello,
>Thanks, I had a look at it. Somehow the test bench is written in Verilog. There appears to be no chance of using waveform files as before.. actually, there is way, to use wave file, to force each waves. but, my suggestion is that why don't you learn HDL. it is time to study it. my document is not so difficult, you can just follow the example. try it.