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Altera_Forum's avatar
Altera_Forum
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17 years ago

simulation performance

I'm wondering what's normal performance of the quartus simulations.

I have a design for Cyclone III that uses about 1900 logic entities and 8 of the dedicated multiplier blocks. It's clocked at 200MHz and I'm simulating 10ms of operation in timing mode. The simulations are taking the best part of an hour to complete on my Dell Latitude D620 laptop with Intel Core2duo T7200. I know not much about the circuit can be told from what I'm describing but is this normal performance? I've noticed that the simulator seems to be single threaded, so only making use of one CPU core.

Also, are there any tricks to speed up the simulation? I'm running Quartus II 8.0 web edition license on Windows XP SP2.

When simulating smaller designs before I have often made lots of small changes and re-ran the simulation over and over. When the simulation takes such a long time to complete that's not really an option anymore because the number of changes I can make over the course of my day is very low if I spend most of if waiting for the simulator to finish. :(

Is this something I can fix by throwing hardware at it or must I really change my way of doing things in such a way that requires less time spent on the simulator? Currently the design is almost complete but I'm sure there are a lot of bugs in it that I need to fix, right now it looks as if I need to try to break the design into smaller parts for simulation where possible.

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  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    --- Quote Start ---

    I did also try Modelsim and that is nice and fast for functional simulations but what I really needed were timing simulations.

    --- Quote End ---

    Modelsim can do functional or timing simulations: if you simulate your RTL code then it's a functional simulation; if you simulate the gate-level .vho (VHDL netlist) with sdf timing annotations then you get a timing simulation.

    I'm sure there's a Verilog equivalent if you want a gate-level netlist in that language instead.
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Interesting, how do I generate the .vho and the timing annotations that match the device I'm using?

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Assignments >> Settings

    then EDA Tool Settings >> simulation.

    Set up according to what you want.
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    --- Quote Start ---

    I did also try Modelsim and that is nice and fast for functional simulations but what I really needed were timing simulations. It seems that I'm clocking some parts of the design too fast and in other parts not waiting long enough between feeding input and reading output. None of these problems become apparent in a functional simulation, there everything works

    --- Quote End ---

    You should catch this kind of problem in static timing analysis if you entered the timing constraints properly. Timing simulation doesn't catch all the problems that static timing analysis does. As I mentioned before, see Rysc's comments about functional versus timing simulation at the end of http://www.alteraforum.com/forum/showthread.php?p=13315.