Forum Discussion
Altera_Forum
Honored Contributor
9 years agoJust to clarify a bit more. You can not only convert your top level schematic into VHDL or Verilog from the schematic editor, you can have it done automatically each time you re-compile. This saves time. Also, Quartus DOES have a simulator built-in (it actually runs ModelSim for you) which, for simple designs, I believe is easier to use than ModelSim. Start by creating a new "vector waveform file" for your simulation (File-> New -> Verification/Debug Files -> University Program VWF). You should search Google and YouTube for instructions on how to go from there.