Simulation or Display???? Quartus or ModelSim???

Some clarification to the above. First of all, there is no such thing as "Quartus Simulation". Quartus hasn't included a simulation tool for a long time. You use the ModelSim-Altera simulation tool included with your installation of Quartus (or your own simulation tool if you have a license). You can perform RTL simulation, which simulates just the functionality of your design, or a gate-level simulation, which tests functionality but also factors in gate delays through your target device. In most cases, you'll just use RTL simulation along with TimeQuest timing analysis to verify your design. Performing a gate-level simulation is more complicated to set up and takes longer to run. Second, you should be able to convert your entire schematic into an HDL (Verilog or VHDL) right from the schematic editor from the top-level. I haven't done this in a long time, so maybe you do have to manually choose to convert each and every block in your schematic. Any IP will not require a conversion because IP is already generated as HDL in the background when you add it to your design.