Simulation fails if Modelsim time resolution is not 1ps

Tricky, other than VHDL code, I use a PLL, dual-port RAM (inferred M9K), dual port ROM (inferred and uses M9K) and embedded multipliers. I'm not using any DDR at the moment.

Based on FvM's comment, I removed the PLL and "manually" generated the clocks for RTL simulation. This did in fact fix the problem of the simulation failing, but did not speed things up even at "-t 1ns".

I am getting a warning:

# ** Warning: Design size of 28692 statements exceeds ModelSim-Intel FPGA Starter Edition recommended capacity.
#  Expect performance to be adversely affected.

which is odd since my code is only a few hundred lines. I was under the impression that libraries were not included and the paid version only gives a 33% performance boost as described here:

https://www.altera.com/products/design-software/model---simulation/modelsim-altera-software.html (https://www.altera.com/products/design-software/model---simulation/modelsim-altera-software.html)

but maybe I'm misunderstanding it.