Simulating Designs with Lower-Level Qsys Systems

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Do you think simulation of a VHDL design with an embedded Nios II processor would be achievable if I were to switch to ModelSim-SE and used its mixed-language simulation?

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Simulation with Modelsim-SE should work.

If it does not, then its likely an error in the Altera simulation scripts, not Modelsim-SE. In that case, you can usually read the error messages in the Modelsim console and determine the source of the error, eg., I've seen cases of missing -L arguments to vsim.

Cheers,

Dave