Forum Discussion
2 Replies
- Altera_Forum
Honored Contributor
I don't know about the existence of such option, but if I REALLY had to do this, in the extreme case I would have ran two modelsims. Then simulate the communication between chips through a pipe in linux. Could be a lot of work, but could potentially work :)
- Altera_Forum
Honored Contributor
Functional simulation in ModelSim isn't related to a particular chip. It basically doesn't matter, if you have one or many DUT's in a testbench.
Typically, I use parts of other designs as auxilary components in a testbench. E. g. the peer of a communication channel is represented by the respective HDL module. I can simulate interesting aspects as effect of a clock frequency offset or transmission delay and delay skew. The wiring of multiple DUT's or auxilary modules has to be done manually of course.