Simple Signed Adder is complex to understand

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Great tip. Thanks. Is there a way I can improve and get better with VHDL other than books? There's so many interesting projects done with FPGAs but not much information when things start to get complex.

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practice then practice. and use higher level design than lower level, don't read too much into books examples.

By the way I should correct my thoughts on that cin:

it does not need 4 bits but two is enough since the addition always gives it weight as lsb, and that zero is just to pretend it is signed positive.